Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously. To simplify matters, we shall assume in this section that circuits do not contain voltage sources. Circuits that contain voltage sources will be analyzed in the next section. In nodal analysis, we are interested in finding the node voltages. Given a circuit with n nodes without voltage sources, the nodal analysis of the circuit involves taking the following three steps.
1. Select a node as the reference node. Assign voltages v1, v2,...,vn−1 to the remaining n − 1 nodes. The voltages are referenced with respect to the reference node.
2. Apply KCL to each of the n − 1 nonreference nodes. Use Ohm’s law to express the branch currents in terms of node voltages.
3. Solve the resulting simultaneous equations to obtain the unknown
node voltages.
The first step in nodal analysis is selecting a node as the reference or datum node. The reference node is commonly called the ground since it is assumed to have zero potential. A reference node is indicated by any of the three symbols in Fig. 3.1. The type of ground in Fig. 3.1(b) is called a chassis ground and is used in devices where the case, enclosure, or chassis acts as a reference point for all circuits. When the potential of
the earth is used as reference, we use the earth ground in Fig. 3.1(a) or (c). We shall always use the symbol in Fig. 3.1(b). As the second step, we apply KCL to each nonreference node in the circuit. To avoid putting too much information on the same circuit, the circuit in Fig. 3.2(a) is redrawn in Fig. 3.2(b), where we now add i1, i2, and i3 as the currents through resistors R1, R2, and R3, respectively. At node 1, applying KCL gives
I1 = I2 + i1 + i2 (3.1)
At node 2,
I2 + i2 = i3 (3.2)
We now apply Ohm’s law to express the unknown currents i1, i2, and i3 in terms of node voltages. The key idea to bear in mind is that, since resistance is a passive element, by the passive sign convention, current
must always flow from a higher potential to a lower potential.
Current flows from a higher potential to a lower potential in a resistor.
| NODAL ANALYSIS WITH VOLTAGE SOURCES |
We now consider how voltage sources affect nodal analysis. We use the circuit in Fig. 3.7 for illustration. Consider the following two possibilities.
CASE 1
If a voltage source is connected between the reference node and a nonreference node, we simply set the voltage at the nonreference node equal to the voltage of the voltage source. In Fig. 3.7, for example,
v1 = 10 V
Thus our analysis is somewhat simplified by this knowledge of the voltage at this node.
CASE 2
If the voltage source( dependent of independent ) is connected between two nonreference nodes, the two nonreference nodes form generalized node or supernode, we apply both KCL and KVL to determine the node voltages.
A supernode is formed by enclosing a (dependent or independent) voltage source connected between two nonreference nodes and any elements connected in parallel with it.
In Fig. 3.7, nodes 2 and 3 form a supernode. (We could have more than two nodes forming a single supernode. For example, see the circuit in Fig. 3.14.) We analyze a circuit with supernodes using the same three steps mentioned in the previous section except that the supernodes are treated differently. Why? Because an essential component of nodal analysis is applying KCL, which requires knowing the current through each element. There is no way of knowing the current through a voltage source in advance. However, KCL must be satisfied at a supernode like any other node. Hence, at the supernode in Fig. 3.7,
i1 + i4 = i2 + i3 (3.11a)
or
v1 − v2 / 2 + v1 − v3 /4 = v2 − 0 / 8 + v3 − 0 / 6 (3.11b)
To apply Kirchhoff’s voltage law to the supernode in Fig. 3.7, we redraw the circuit as shown in Fig. 3.8. Going around the loop in the clockwise direction gives
−v2 + 5 + v3 = 0 ⇒ v2 − v3 = 5 (3.12)
| My Learning Experience XD |
I learned that in Method of Analysis the voltage source inside the supernode provides a constraint equation needed to solve for the node voltages. A supernode has no voltage of its own. A supernode requires the application of both KCL and KVL. Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously.
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