Method of Analysis in Electric Circuit

| NODAL ANALYSIS |

Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously. To simplify matters, we shall assume in this section that circuits do not contain voltage sources. Circuits that contain voltage sources will be analyzed in the next section. In nodal analysis, we are interested in finding the node voltages. Given a circuit with n nodes without voltage sources, the nodal analysis of the circuit involves taking the following three steps.

Steps to Determine Node Voltages:

1. Select a node as the reference node. Assign voltages v1, v2,...,vn−1 to the remaining n − 1 nodes. The voltages are referenced with respect to the reference node.

2. Apply KCL to each of the n − 1 nonreference nodes. Use Ohm’s law to express the branch currents in terms of node voltages.

3. Solve the resulting simultaneous equations to obtain the unknown
node voltages.

The first step in nodal analysis is selecting a node as the reference or datum node. The reference node is commonly called the ground since it is assumed to have zero potential. A reference node is indicated by any of the three symbols in Fig. 3.1. The type of ground in Fig. 3.1(b) is called a chassis ground and is used in devices where the case, enclosure, or chassis acts as a reference point for all circuits. When the potential of
the earth is used as reference, we use the earth ground in Fig. 3.1(a) or (c). We shall always use the symbol in Fig. 3.1(b). As the second step, we apply KCL to each nonreference node in the circuit. To avoid putting too much information on the same circuit, the circuit in Fig. 3.2(a) is redrawn in Fig. 3.2(b), where we now add i1, i2, and i3 as the currents through resistors R1, R2, and R3, respectively. At node 1, applying KCL gives

 I1 = I2 + i1 + i2 (3.1)
At node 2,

I2 + i2 = i3 (3.2)

We now apply Ohm’s law to express the unknown currents i1, i2, and i3 in terms of node voltages. The key idea to bear in mind is that, since resistance is a passive element, by the passive sign convention, current
must always flow from a higher potential to a lower potential.

Current flows from a higher potential to a lower potential in a resistor.

| NODAL ANALYSIS WITH VOLTAGE SOURCES |

We now consider how voltage sources affect nodal analysis. We use the circuit in Fig. 3.7 for illustration. Consider the following two possibilities.

CASE 1

If a voltage source is connected between the reference node and a nonreference node, we simply set the voltage at the nonreference node equal to the voltage of the voltage source. In Fig. 3.7, for example,

v1 = 10 V

Thus our analysis is somewhat simplified by this knowledge of the voltage at this node.

CASE 2

If the voltage source( dependent of independent ) is connected between two nonreference nodes, the two nonreference nodes form generalized node or supernode, we apply both KCL and KVL to determine the node voltages.

A supernode is formed by enclosing a (dependent or independent) voltage source connected between two nonreference nodes and any elements connected in parallel with it.

In Fig. 3.7, nodes 2 and 3 form a supernode. (We could have more than two nodes forming a single supernode. For example, see the circuit in Fig. 3.14.) We analyze a circuit with supernodes using the same three steps mentioned in the previous section except that the supernodes are treated differently. Why? Because an essential component of nodal analysis is applying KCL, which requires knowing the current through each element. There is no way of knowing the current through a voltage source in advance. However, KCL must be satisfied at a supernode like any other node. Hence, at the supernode in Fig. 3.7,

i1 + i4 = i2 + i3                                                                                   (3.11a)
or
v1 − v2 / 2 + v1 − v3  /4 = v2 − 0 / 8 + v3 − 0 / 6                              (3.11b)

To apply Kirchhoff’s voltage law to the supernode in Fig. 3.7, we redraw the circuit as shown in Fig. 3.8. Going around the loop in the clockwise direction gives

−v2 + 5 + v3 = 0 ⇒ v2 − v3 = 5                                                          (3.12)

| My Learning Experience XD |

I learned that in Method of Analysis  the voltage source inside the supernode provides a constraint equation needed to solve for the node voltages. A supernode has no voltage of its own. A supernode requires the application of both KCL and KVL. Nodal analysis provides a general procedure for analyzing circuits using node voltages as the circuit variables. Choosing node voltages instead of element voltages as circuit variables is convenient and reduces the number of equations one must solve simultaneously.

The Basic Law of Electric Circuits (cont.)

| Series Resistors and Voltage Division |

The need to combine resistors in series or in parallel occurs so frequently that it warrants special attention. The process of combining the resistors is facilitated by combining two of them at a time.

The two resistors are in series, since the same current i flows in both of them. Applying

Ohm’s law to each of the resistors, we obtain

If we apply KVL to the loop (moving in the clockwise direction), we have

                                                    

combining, we get

 Equivalent Resistance

                            The Equivalent Resistance of any number of resistors connected in series is the sum of the individual resistance.

To determine the voltage across each resistor...

Notice that the source voltage v is divided among the resistors in direct proportion to their resistances; the larger the resistance, the larger the voltage drop. This is called the principle of voltage division.

| Parallel Resistors and Current Division |

Consider the circuit in Fig. 2.31, where two resistors are connected in parallel and therefore have the same voltage across them. From Ohm’s law,

Applying KCL at node agives the total current i as

Substituting..

where Req is the equivalent resistance of the resistors in parallel:

Equivalent resistance

                           The  Equivalent resistance of two parallel is equal to the product of their resistance divided by their sum.

| Conductance |

It is often more convenient to use conductance rather than resistance when dealing with resistors in parallel.

The equivalent conductance for N resistors in parallel is

Equivalent Conductance

                            The Equivalent Conductance of resistors connected in parallel is the sum of their individual conductance. 

The Basic Laws of Electric CircuitS (cont.)

Welcome back guys, this topic now is the continuation of the basic laws of electric circuit. Since the elements of an electric circuit can be interconnected in several ways, we need to also to understand some basic concepts of network topology. In network topology, we study the properties relating to the placement of elements in the network and the geometric configuration of the network.

| NODES, BRANCHES, AND LOOPS |

What are these Nodes, Branches, and Loops ?

Branch

        - a branch represents a single element such as a voltage source or a resistor.

In other words guys, a branch represents any two-terminal element. The circuit in Figure has five branches, namely, the 10-V voltage source, the 2-A current source, and the three resistors.

Node

        - a node is the point of connection between two or more branches.

A node is usually indicated by a dot in a circuit. The circuit in Figure has three nodes a, b, and c. Notice that the three points that form node b are connected by perfectly conducting wires and therefore constitute a single point. the same is true of the four points forming node c.

Loop

       - a loop is any closed path in a circuit.

A loop is a closed path formed by starting at a node, passing through a set of nodes, and returning to the starting node without passing through any node more than once.

| KIRCHHOFF'S LAWS |

What is Kirchhoff's Current Law ?

               - KCL or Kirchhoff's Current Law states that the algebraic sum of currents entering a node ( or a closed boundary ) is zero.

Mathematically, KCL implies that 

where N is the number of branches connected to the node and (i sub k) is the nth current entering (or leaving) the node. By this law, currents entering a node may be regarded as positive, while currents leaving the node may be taken as negative or vice versa.

here is one of example on how the KCL solves.

i1 + (-i2) + i3 + i4 + (-i5) = 0

since currents i1, i3 and i4, are entering the node, while currents i2 and i5 are leaving it. By rearranging the terms, we get

i1 + i3 + i4 = i2 + i5

The sum of the currents entering a node is equal to the sum of the currents leaving the node.

What is Kirchhoff's Current Law ?

  - state that the algebraic sum of all voltages around a closed path (or loop) is zero.

expressed mathematically, KVL states that

where k is the number of voltages in the loop (or the number of branches in the loop) and V sub k is the kth voltage.

For example, in the figures we branch 3, the positive terminal is met first; hence we have +3. For branch 4, we reach the negative terminal first; hence, -v4. Thus, KVL yields

-v1 + v2 + v3 - v4 + v5 = 0

rearranging terms gives

v2 + v3 + v5 = v1 + v4

which may be interpreted as

Sum of voltage drops = Sum of voltage rises

| My Learning Experience XD |

This week I learned that in a circuit there's also an element which may interconnected in several ways, these are Nodes, Branches, and Loop. I learned also that on how to group each elements with help of sir Jay. I learned also The Kirschhoff's Law. In Kirschhoff's Law there are two law they are Kirschhoff's current Law and Kirschhoff's voltage Law. Sir jay also taught as on how to solved the problems of these two laws.